English

Data-Driven Approach for Accelerating Selective Harmonic Elimination Algorithm in Parallel Power Converters

Systems and Control 2024-12-06 v1 Systems and Control

Abstract

Current ripple minimization is one of the challenges in parallel converters to increase the capacitor lifetime in various applications. In this paper, a deep neural network-based phase-shifting (PS) technique is proposed for parallel-connected buck converters to minimize the amplitude of a selective harmonic component and facilitate a classic optimum PS at the same time. The proposed method identifies the global optimum point in real time, without the need for complicated computations. The common-link current, common-link voltage, and the duty ratios are selected as the inputs of the neural network to provide the proper phase shifts for the switching signals. To accumulate the required dataset, a Different Start-Same Step (DSSS) technique is also introduced to generate the training data and test/validation data in a separate way. The effect of the number of hidden layers on the network output error is investigated, and a proper number of hidden layers is designed based on a compromise between accuracy and computation efficiency (and execution time). Experimental results prove that the proposed artificial neural network-based PS method preserves the performance of classic optimum PS and minimizing the implementation time significantly.

Keywords

Cite

@article{arxiv.2412.03626,
  title  = {Data-Driven Approach for Accelerating Selective Harmonic Elimination Algorithm in Parallel Power Converters},
  author = {E. Karimi and S. Shahnooshi and E. Meshkati and T. Dragičević and F. Blaabjerg},
  journal= {arXiv preprint arXiv:2412.03626},
  year   = {2024}
}

Comments

9 pages, 9 figures

R2 v1 2026-06-28T20:23:24.726Z