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DAMO: Deep Agile Mask Optimization for Full Chip Scale

Hardware Architecture 2020-11-17 v2

Abstract

Continuous scaling of the VLSI system leaves a great challenge on manufacturing and optical proximity correction (OPC) is widely applied in conventional design flow for manufacturability optimization. Traditional techniques conducted OPC by leveraging a lithography model and suffered from prohibitive computational overhead, and mostly focused on optimizing a single clip without addressing how to tackle the full chip. In this paper, we present DAMO, a high performance and scalable deep learning-enabled OPC system for full chip scale. It is an end-to-end mask optimization paradigm which contains a Deep Lithography Simulator (DLS) for lithography modeling and a Deep Mask Generator (DMG) for mask pattern generation. Moreover, a novel layout splitting algorithm customized for DAMO is proposed to handle the full chip OPC problem. Extensive experiments show that DAMO outperforms the state-of-the-art OPC solutions in both academia and industrial commercial toolkit.

Keywords

Cite

@article{arxiv.2008.00806,
  title  = {DAMO: Deep Agile Mask Optimization for Full Chip Scale},
  author = {Guojin Chen and Wanli Chen and Yuzhe Ma and Haoyu Yang and Bei Yu},
  journal= {arXiv preprint arXiv:2008.00806},
  year   = {2020}
}
R2 v1 2026-06-23T17:35:56.640Z