We present a fixed point architecture (source VHDL code is provided) for powering computation. The fully customized architecture, based on the expanded hyperbolic CORDIC algorithm, allows for design space exploration to establish trade-offs among design parameters (numerical format, number of iterations), execution time, resource usage and accuracy. We also generate Pareto-optimal realizations in the resource-accuracy space: this approach can produce optimal hardware realizations that simultaneously satisfy resource and accuracy requirements.
@article{arxiv.1605.03229,
title = {CORDIC-based Architecture for Powering Computation in Fixed-Point Arithmetic},
author = {Nia Simmonds and Joshua Mack and Sam Bellestri and Daniel Llamocca},
journal= {arXiv preprint arXiv:1605.03229},
year = {2016}
}