Connectivity Labeling Schemes for Edge and Vertex Faults via Expander Hierarchies
Abstract
We consider the problem of assigning short labels to the vertices and edges of a graph so that given any query with , we can determine whether and are still connected in , given only the labels of . This problem has been considered when (edge faults), where correctness is guaranteed with high probability (w.h.p.) or deterministically, and when (vertex faults), both w.h.p.~and deterministically. Our main results are as follows. [Deterministic Edge Faults.] We give a new deterministic labeling scheme for edge faults that uses -bit labels, which can be constructed in polynomial time. This improves on Dory and Parter's [PODC 2021] existential bound of (requiring exponential time to compute) and the efficient -bit scheme of Izumi, Emek, Wadayama, and Masuzawa [PODC 2023]. Our construction uses an improved edge-expander hierarchy and a distributed coding technique based on Reed-Solomon codes. [Deterministic Vertex Faults.] We improve Parter, Petruschka, and Pettie's [STOC 2024] deterministic -bit labeling scheme for vertex faults to bits, using an improved vertex-expander hierarchy and better sparsification of shortcut graphs. [Randomized Edge/Verex Faults.] We improve the size of Dory and Parter's [PODC 2021] randomized edge fault labeling scheme from bits to bits, shaving a factor. We also improve the size of Parter, Petruschka, and Pettie's [STOC 2024] randomized vertex fault labeling scheme from bits to bits, which comes closer to their -bit lower bound.
Cite
@article{arxiv.2410.18885,
title = {Connectivity Labeling Schemes for Edge and Vertex Faults via Expander Hierarchies},
author = {Yaowei Long and Seth Pettie and Thatchaphol Saranurak},
journal= {arXiv preprint arXiv:2410.18885},
year = {2024}
}
Comments
To appear in SODA 2025