Device passivation through ultraclean hexagonal BN encapsulation is proven one of the most effective ways for constructing high-quality devices with atomically thin semiconductors that preserves the ultraclean interface quality and intrinsic charge transport behavior. However, it remains challenging to integrate lithography compatible contact electrodes with flexible distributions and patterns. Here, we report the feasibility in straightforwardly integrating lithography defined contacts into BN encapsulated 2D FETs, giving rise to overall device quality comparable to the state-of-the-art results from the painstaking pure dry transfer processing. Electronic characterization on FETs consisting of WSe2 and MoS2 channels reveals an extremely low scanning hysteresis of ca. 2 mV on average, a low density of interfacial charged impurity of ca. 1011cm−2, and generally high charge mobilities over 1000cm2⋅V−1⋅s−1 at low temperatures. The overall high device qualities verify the viability in directly integrating lithography defined contacts into BN encapsulated devices to exploit their intrinsic charge transport properties for advanced electronics.
@article{arxiv.2306.15691,
title = {Clean BN encapsulated 2D FETs with lithography compatible contacts},
author = {Binxi Liang and Anjian Wang and Jian Zhou and Shihao Ju and Jian Chen and Kenji Watanabe and Takashi Taniguchi and Yi Shi and Songlin Li},
journal= {arXiv preprint arXiv:2306.15691},
year = {2023}
}