Block-matching in FPGA
Image and Video Processing
2020-06-26 v1 Hardware Architecture
Computer Vision and Pattern Recognition
Abstract
Block-matching and 3D filtering (BM3D) is an image denoising algorithm that works in two similar steps. Both of these steps need to perform grouping by block-matching. We implement the block-matching in an FPGA, leveraging its ability to perform parallel computations. Our goal is to enable other researchers to use our solution in the future for real-time video denoising in video cameras that use FPGAs (such as the AXIOM Beta).
Cite
@article{arxiv.2006.14105,
title = {Block-matching in FPGA},
author = {Rafael Pizarro Solar and Michal Pleskowicz},
journal= {arXiv preprint arXiv:2006.14105},
year = {2020}
}
Comments
19 pages, 15 figures, paper submitted in "CS413 - Computational Photography" at EPFL, for project repository see $\href{https://github.com/UlisesLuzius/ImageProcessingPipeline/}{\text{link}}$