Binary nullity, Euler circuits and interlace polynomials
Abstract
A theorem of Cohn and Lempel [J. Combin. Theory Ser. A 13 (1972), 83-89] gives an equality relating the number of circuits in a directed circuit partition of a 2-in, 2-out digraph to the GF(2)-nullity of an associated matrix. This equality is essentially equivalent to the relationship between directed circuit partitions of 2-in, 2-out digraphs and vertex-nullity interlace polynomials of interlace graphs. We present an extension of the Cohn-Lempel equality that describes arbitrary circuit partitions in (undirected) 4-regular graphs. The extended equality incorporates topological results that have been of use in knot theory, and it implies that if H is obtained from an interlace graph by attaching loops at some vertices then the vertex-nullity interlace polynomial is essentially the generating function for certain circuit partitions of an associated 4-regular graph.
Cite
@article{arxiv.0903.4405,
title = {Binary nullity, Euler circuits and interlace polynomials},
author = {Lorenzo Traldi},
journal= {arXiv preprint arXiv:0903.4405},
year = {2009}
}
Comments
8 pages (v1); 10 pages (v2). Further changes may be made before publication in the European Journal of Combinatorics