The latest results of benchmarking research are presented for a variety of beyond-CMOS charge- and spin-based devices. In addition to improving the device-level models, several new device proposals and a few majorly modified devices are investigated. Deep pipelining circuits are employed to boost the throughput of low-power devices. Furthermore, the benchmarking methodology is extended to interconnect-centric analyses and non-Boolean logic applications. In contrast to Boolean circuits, non-Boolean circuits based on the cellular neural network demonstrate that spintronic devices can potentially outperform conventional CMOS devices.
@article{arxiv.1711.04295,
title = {Beyond-CMOS Device Benchmarking for Boolean and Non-Boolean Logic Applications},
author = {Chenyun Pan and Azad Naeemi},
journal= {arXiv preprint arXiv:1711.04295},
year = {2017}
}