English

B\"uchi-Kamp Theorems for 1-clock ATA

Logic in Computer Science 2018-02-08 v1

Abstract

This paper investigates Kamp-like and B\"uchi-like theorems for 1-clock Alternating Timed Automata (1-ATA) and its natural subclasses. A notion of 1-ATA with loop-free-resets is defined. This automaton class is shown to be expressively equivalent to the temporal logic \regmtl\regmtl which is MTL[FI]\mathsf{MTL[F_I]} extended with a regular expression guarded modality. Moreover, a subclass of future timed MSO with k-variable-connectivity property is introduced as logic \qkmso\qkmso. In a Kamp-like result, it is shown that \regmtl\regmtl is expressively equivalent to \qkmso\qkmso. As our second result, we define a notion of conjunctive-disjunctive 1-clock ATA (\wf\wf 1-ATA). We show that \wf\wf 1-ATA with loop-free-resets are expressively equivalent to the sublogic \F\regmtl\F\regmtl of \regmtl\regmtl. Moreover \F\regmtl\F\regmtl is expressively equivalent to \qtwomso\qtwomso, the two-variable connected fragment of \qkmso\qkmso. The full class of 1-ATA is shown to be expressively equivalent to \regmtl\regmtl extended with fixed point operators.

Keywords

Cite

@article{arxiv.1802.02514,
  title  = {B\"uchi-Kamp Theorems for 1-clock ATA},
  author = {Shankara Narayanan Krishna and Khushraj Madnani and Paritosh Pandya},
  journal= {arXiv preprint arXiv:1802.02514},
  year   = {2018}
}
R2 v1 2026-06-23T00:14:46.466Z