English

Architecture, Simulation and Software Stack to Support Post-CMOS Accelerators: The ARCHYTAS Project

Hardware Architecture 2025-10-21 v1

Abstract

ARCHYTAS aims to design and evaluate non-conventional hardware accelerators, in particular, optoelectronic, volatile and non-volatile processing-in-memory, and neuromorphic, to tackle the power, efficiency, and scalability bottlenecks of AI with an emphasis on defense use cases (e.g., autonomous vehicles, surveillance drones, maritime and space platforms). In this paper, we present the system architecture and software stack that ARCHYTAS will develop to integrate and support those accelerators, as well as the simulation software needed for early prototyping of the full system and its components.

Keywords

Cite

@article{arxiv.2510.16487,
  title  = {Architecture, Simulation and Software Stack to Support Post-CMOS Accelerators: The ARCHYTAS Project},
  author = {Giovanni Agosta and Stefano Cherubin and Derek Christ and Francesco Conti and Asbjørn Djupdal and Matthias Jung and Georgios Keramidas and Roberto Passerone and Paolo Rech and Elisa Ricci and Philippe Velha and Flavio Vella and Kasim Sinan Yildirim and Nils Wilbert},
  journal= {arXiv preprint arXiv:2510.16487},
  year   = {2025}
}
R2 v1 2026-07-01T06:44:58.201Z