A Study of Quantisation-aware Training on Time Series Transformer Models for Resource-constrained FPGAs

Tianheng Ling; Chao Qian; Lukas Einhaus; Gregor Schiele

A Study of Quantisation-aware Training on Time Series Transformer Models for Resource-constrained FPGAs

Machine Learning 2023-10-05 v1 Artificial Intelligence Hardware Architecture

Authors: Tianheng Ling , Chao Qian , Lukas Einhaus , Gregor Schiele

Abstract

This study explores the quantisation-aware training (QAT) on time series Transformer models. We propose a novel adaptive quantisation scheme that dynamically selects between symmetric and asymmetric schemes during the QAT phase. Our approach demonstrates that matching the quantisation scheme to the real data distribution can reduce computational overhead while maintaining acceptable precision. Moreover, our approach is robust when applied to real-world data and mixed-precision quantisation, where most objects are quantised to 4 bits. Our findings inform model quantisation and deployment decisions while providing a foundation for advancing quantisation techniques.

Keywords

quantisation-aware training time series transformer adaptive quantisation mixed-precision quantisation resource-constrained fpga model deployment

Cite

@article{arxiv.2310.02654,
  title  = {A Study of Quantisation-aware Training on Time Series Transformer Models for Resource-constrained FPGAs},
  author = {Tianheng Ling and Chao Qian and Lukas Einhaus and Gregor Schiele},
  journal= {arXiv preprint arXiv:2310.02654},
  year   = {2023}
}

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12 pages, 1 figure

A Study of Quantisation-aware Training on Time Series Transformer Models for Resource-constrained FPGAs

Abstract

Keywords

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