In this work, we report a novel design, one-transistor-one-inverter (1T1I), to satisfy high speed and low power on-chip training requirements. By leveraging doped HfO2 with ferroelectricity, a non-volatile inverter is successfully demonstrated, enabling desired continuous weight transition between negative and positive via the programmable threshold voltage (VTH) of ferroelectric field-effect transistors (FeFETs). Compared with commonly used designs with the similar function, 1T1I uniquely achieves pure on-chip-based weight transition at an optimized working current without relying on assistance from off-chip calculation units for signed-weight comparison, facilitating high-speed training at low power consumption. Further improvements in linearity and training speed can be obtained via a two-transistor-one-inverter (2T1I) design. Overall, focusing on energy and time efficiencies, this work provides a valuable design strategy for future FeFET-based computing-in-memory (CiM).
@article{arxiv.2209.09083,
title = {A Novel Non-Volatile Inverter-based CiM: Continuous Sign Weight Transition and Low Power on-Chip Training},
author = {Dong Zhang and Yuye Kang and Gan Liu and Zuopu Zhou and Kaizhen Han and Chen Sun and Leming Jiao and Xiaolin Wang and Yue Chen and Qiwen Kong and Zijie Zheng and Long Liu and Xiao Gong},
journal= {arXiv preprint arXiv:2209.09083},
year = {2022}
}