A Hardware-Efficient ADMM-Based SVM Training Algorithm for Edge Computing
Abstract
This work demonstrates a hardware-efficient support vector machine (SVM) training algorithm via the alternative direction method of multipliers (ADMM) optimizer. Low-rank approximation is exploited to reduce the dimension of the kernel matrix by employing the Nystr\"{o}m method. Verified in four datasets, the proposed ADMM-based training algorithm with rank approximation reduces 32 of matrix dimension with only 2% drop in inference accuracy. Compared to the conventional sequential minimal optimization (SMO) algorithm, the ADMM-based training algorithm is able to achieve a 9.810 shorter latency for training 2048 samples. Hardware design techniques, including pre-computation and memory sharing, are proposed to reduce the computational complexity by 62% and the memory usage by 60%. As a proof of concept, an epileptic seizure detector chip is designed to demonstrate the effectiveness of the proposed hardware-efficient training algorithm. The chip achieves a 153,310 higher energy efficiency and a 364 higher throughput-to-area ratio for SVM training than a high-end CPU. This work provides a promising solution for edge devices which require low-power and real-time training.
Keywords
Cite
@article{arxiv.1907.09916,
title = {A Hardware-Efficient ADMM-Based SVM Training Algorithm for Edge Computing},
author = {Shuo-An Huang and Chia-Hsiang Yang},
journal= {arXiv preprint arXiv:1907.09916},
year = {2019}
}
Comments
10 pages, 1 table, and 9 figures