English

A Closed-loop Brain-Machine Interface SoC Featuring a 0.2$\mu$J/class Multiplexer Based Neural Network

Signal Processing 2024-01-09 v1

Abstract

This work presents the first fabricated electrophysiology-optogenetic closed-loop bidirectional brain-machine interface (CL-BBMI) system-on-chip (SoC) with electrical neural signal recording, on-chip sleep staging and optogenetic stimulation. The first multiplexer with static assignment based table lookup solution (MUXnet) for multiplier-free NN processor was proposed. A state-of-the-art average accuracy of 82.4% was achieved with an energy consumption of only 0.2μ\muJ/class in sleep staging task.

Keywords

Cite

@article{arxiv.2401.03396,
  title  = {A Closed-loop Brain-Machine Interface SoC Featuring a 0.2$\mu$J/class Multiplexer Based Neural Network},
  author = {Chao Zhang and Yongxiang Guo and Dawid Sheng and Zhixiong Ma and Chao Sun and Yuwei Zhang and Wenxin Zhao and Fenyan Zhang and Tongfei Wang and Xing Sheng and Milin Zhang},
  journal= {arXiv preprint arXiv:2401.03396},
  year   = {2024}
}

Comments

2 pages, 6 figures. Accepted by IEEE Custom Integrated Circuits Conference (CICC) 2024. The codes for the MUXnet (constructing neural networks using multiplexers instead of multipliers) will be open-sourced after the Journal version of this work is accepted

R2 v1 2026-06-28T14:10:26.500Z